Hardware Verification Engineer (Sponsorship available)
This role involves verifying security-critical hardware designs for cryptographic IPs and subsystems using UVM and formal methods. The engineer will develop testbenches, create Python-based automation tools, and debug across multiple levels—from waveforms to algorithms—while collaborating with design and software teams. A 'break it to make it' mindset is essential, with responsibilities spanning coverage closure, methodology development, and mentoring junior engineers in a high-assurance environment.