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Join to apply for the Python Based Photonic Layout Engineer role at Salience Labs
⌕ Job Overview
As a Photonics Layout Engineer at Salience Labs, you will play a critical role in helping us design and build active photonic switches for large-scale systems. You’ll work closely with our photonics design engineers to create component and chip-level layouts using both Python and specialist photonic layout tools. Your work will directly support the tape-out process and influence the performance of our photonic integrated circuits. This is an ideal role for someone early in their career looking to grow their technical layout expertise while contributing to a high-impact team. Mentorship and hands-on training will be provided.
⌕ Job Overview
As a Photonics Layout Engineer at Salience Labs, you will play a critical role in helping us design and build active photonic switches for large-scale systems. You’ll work closely with our photonics design engineers to create component and chip-level layouts using both Python and specialist photonic layout tools. Your work will directly support the tape-out process and influence the performance of our photonic integrated circuits. This is an ideal role for someone early in their career looking to grow their technical layout expertise while contributing to a high-impact team. Mentorship and hands-on training will be provided.
✎ What You'll Be Doing
Use Python-based layout tools and other specialised photonic IC design packages to draw the layout of photonic components, sub-systems, and full chips.
Work with the photonics design team to develop a library of optimised photonic components..
Perform chip-level layout using specialised photonic design tools.
Run and debug DRC, LVS, and other layout verification checks at both component and chip levels.
Work with the photonics design team to resolve layout errors and optimise photonic IC performance.
Support the delivery of photonics tape-outs according to project timelines.
Assist with design reviews, layout documentation, and version tracking.
Support hardware, system design, component design, and failure analysis of photonics systems, as the owner of photonics layout and associated documentation.
Contribute to toolchain improvements, including the adoption and integration of new layout and verification software.
Become an expert in the foundry process technologies used by Salience Labs.
???????? What We're Looking For
Strong programming skills in Python, C, Java or similar languages.
Bachelor’s degree or equivalent in physics, photonics, electrical engineering, or optical engineering.
1+ years of relevant experience, or recent graduate with programming or layout experience.
Familiarity with the semiconductor or photonics IC industry and its design and fabrication workflows.
Strong analytical skills, attention to detail, and a self-motivated approach to learning and development.
Clear and effective communication skills and a collaborative team mindset.
✧ Even Better If You
Have hands-on experience writing Python for layout automation or design tooling.
Understand photonics device principles, including waveguides, multiplexers/demultiplexers, tapers, grating couplers, and modulators.
Have experience with photonics or electronic IC layout and verification tools.
Are familiar with semiconductor manufacturing technologies and processes.
Have worked on tape-outs for photonics ICs, lasers, photodetectors, or similar optoelectronic devices.
This is a unique opportunity to grow your career as a Photonics Layout Engineer while helping to shape the future of high-speed connectivity and optical computing. If you’re passionate about photonics, programming, and contributing to breakthrough technology, we’d love to hear from you.
Salience is a leader in photonic solutions targeting connectivity for AI data center and financial trading infrastructure.
Founded in 2021 and backed by over a decade of research from the University of Oxford in the UK and University of Münster in Germany, Salience’s innovative developments in photonic switching technology enable high-speed, ultra-low latency networking fabrics that remove infrastructure bottlenecks for AI workloads.
Seniority level Seniority level Entry level
Employment type Employment type Full-time
Job function Job function Engineering and Information Technology
Industries Computer Hardware Manufacturing
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